The present invention relates generally to electronic systems, and more particularly relates to methods and apparatus for connecting multiple test access port controllers on a single integrated circuit through a single test access port.
Advances in semiconductor manufacturing technology, as well as in digital systems architecture, have resulted in the ability to design and produce larger integrated circuits incorporating much more functionality than has been possible in the past. A particular class of integrated circuits, which incorporate at least several large functional blocks to produce a high level of functionality, is referred to as System on Chip (SoC). Such SoC integrated circuits often include one or more processors along with memory for storing program code that is to be executed by the processors, and one or more circuit blocks for implementing various high-level peripheral functions. Such large, complex, and highly functional integrated circuits present many challenges in terms of design effort and testing.
In order to reduce the amount of time and effort required to design a complex integrated circuit such as a SoC, engineers often attempt to re-use functional blocks (sometimes referred to as IP cores). Indeed, many design groups maintain libraries of such pre-designed and pre-verified IP cores. To maintain the advantages of using such pre-designed and pre-verified IP cores, it is preferable to not have to modify the internal design of such cores.
In order to address the requirements for testability, a number of efforts have led to the development of test architectures, such as the JTAG specification which has been formalized by the Institute of Electrical and Electronic Engineers as IEEE Standard 1149.1 Test Access Port and Boundary Scan Architecture. Test access is provided to a whole integrated circuit, or a portion thereof, through a test access port (TAP) controller along with a variety of registers. A TAP controller may be associated with each of a plurality of large functional blocks, such as, for example, IP cores.
Some pre-designed IP cores may include TAP controllers, in other instances TAP controllers must be added to an integrated circuit design by the engineers as the one or more IP cores are included in a product design.
What is needed are methods and apparatus for accessing multiple test access port controllers on a single integrated circuit.